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Program status word

Computer processor element

The program status word (PSW) is a register that performs the function of a status register and program counter, and sometimes more. The term is also applied to a copy of the PSW in storage. This article only discusses the PSW in the IBM System/360 and its successors, and follows the IBM convention of numbering bits starting with 0 as the leftmost (most significant) bit.

Although certain fields within the PSW may be tested or set by using non-privileged instructions, testing or setting the remaining fields may only be accomplished by using privileged instructions.

Contained within the PSW are the two bit condition code, representing zero, positive, negative, overflow, and similar flags of other architectures' status registers. Conditional branch instructions test this encoded as a four bit value, with each bit representing a test of one of the four condition code values, 23 + 22 + 21 + 20. (Since IBM uses big-endian bit numbering, mask value 8 selects code 0, mask value 4 selects code 1, mask value 2 selects code 2, and mask value 1 selects code 3.)

The 64-bit PSW describes (among other things)

Interrupt masks
Privilege states
Condition code
Instruction address

In the early instances of the architecture (System/360 and early System/370), the instruction address was 24{{efn|However, a 360/67 equipped with the Extended Dynamic Address Translation feature has a 32-bit mode selected by bit 4 of the PSW in Extended PSW mode (Control Register 6, bit 8).}} bits; in later instances (XA/370), the instruction address was 31 bits plus a mode bit (24 bit addressing mode if zero; 31 bit addressing mode if one) for a total of 32 bits.

In the present instances of the architecture (z/Architecture), the instruction address is 64 bits and the PSW itself is 128 bits.

The PSW may be loaded by the LOAD PSW instruction (LPSW or LPSWE). Its contents may be examined with the Extract PSW instruction (EPSW).

Format

S/360

On all but 360/20, the PSW has the following formats. S/360 Extended PSW format only applies to the 360/67 with bit 8 of control register 6 set.

Bit	Meaning
0	Channel 0 mask
1	Channel 1 mask
2	Channel 2 mask
3	Channel 3 mask
4	Channel 4 mask
5	Channel 5 mask
6	Channel 6 mask
7	External Mask

|- | 8-11 | Key

PSW key
12
A
ASCII
-
13
M
Machine-check mask
-
14
W
Wait state
-
15
P
Problem state
-
16-31
IC
Interruption Code
-
32-33
ILC
Instruction-Length Code
-
34-35
CC
Condition Code
-
36-39
PM

Bit	Meaning
36	Fixed-point overflow
37	Decimal overflow
38	Exponent underflow
39	Significance

|- | 40-63 | IA | Instruction Address |}

}

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

|- | 24-31 |

Spare
32-63
IA
Instruction Address
}
}
}

S/370

Bit	Meaning
36	Fixed-point overflow
37	Decimal overflow
38	Exponent underflow
39	Significance

|- | 40-63 | IA | Instruction Address |}

}

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

|- | 40-63 | IA | Instruction Address |} |} |}

S/370 Extended Architecture (S/370-XA)

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

|- | 32 | A | Addressing mode 0=24 bit; 1=31 bit |- | 33-63 | IA | Instruction Address |} |} |}

Enterprise Systems Architecture (ESA)

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

|- | 32 | A | Addressing mode 0=24 bit; 1=31 bit |- | 33-63 | IA | Instruction Address |} |} |}

z/Architecture

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	HFP Exponent underflow
23	HFP Significance

|- | 24 | RI

Reserved for IBM
31
EA
Extended Addressing mode
0=defined by BA below; 1=64-bit, BA must be zero
-
32
BA
Basic Addressing mode
0=24 or 64; 1=31
-
64-127
IA
Instruction Address
}
}
-
-

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	HFP Exponent underflow
23	HFP Significance

|- | 24 | RI

Reserved for IBM
31
EA
Extended Addressing mode
0=defined by BA below; 1=64-bit, BA must be zero
-
32
BA
Basic Addressing mode
0=24 or 64; 1=31
-
33-63
IA
Instruction Address
}
}
}

Notes

References

;S360 :{{cite manual ;func67 :{{Cite manual ;S370 :{{cite manual ;S370-XA :{{cite manual ;S370-ESA :{{cite manual ;z :{{cite manual

Info: Wikipedia Source

This article was imported from Wikipedia and is available under the Creative Commons Attribution-ShareAlike 4.0 License. Content has been adapted to SurfDoc format. Original contributors can be found on the article history page.

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