Bus Pirate

Overview

The Bus Pirate was designed for debugging, prototyping, and analysing "new or unknown chips". Using a Bus Pirate, a developer can use a serial terminal to interface with a device, via such hardware protocols as SPI, I2C and 1-Wire.

The Bus Pirate is capable of programming low-end microcontrollers, such as Atmel AVRs and Microchip PICs. Programming using more advanced protocols such as JTAG and SWD is possible but limited due to hardware speed. Support for JTAG version 5 is in progress.

The Bus Pirate 5 was designed by Ian Lesnet of Dangerous Prototypes and Sjaak of SMD Prutser.

Feature list

The Bus Pirate v3.6 can communicate via the following serial protocols, with line levels of 0–5.5 volts: 1-Wire, I²C, SPI, JTAG, asynchronous serial, and MIDI.

It can receive input from a keyboard, and can output to a Hitachi HD44780 LCD controller.

Other features:

• UART
• 2- and 3-wire libraries with bitwise pin control
• 0 – 6 volt measurement probe
• 1 Hz – 40 MHz frequency measurement
• 1 kHz – 4 MHz pulse-width modulator, frequency generator
• On-board multi-voltage pull-up resistors
• On-board 3.3 volt and 5 volt power supplies with software reset
• Macros for common operations
• Bus traffic sniffers (SPI, I²C)
• A bootloader for easy firmware updates
• Transparent USB - serial mode
• 10 Hz – 1 MHz SUMP compatible low-speed logic analyzer
• AVR STK500 v2 programmer clone, supported in AVRDude programmer software

Generational differences

The size of the circuit board was changed to 60 mm x 37 mm in the Bus Pirate v3.6 and up so it would match the mounting holes for the "Sick of Beige" DP6037 case.

The Bus Pirate v3.6 is based on an PIC24 MCU (SSOP), and communicates with a host computer with either a USB interface with a FT232RL (SSOP) or an on-chip USB module.

The Bus Pirate 5 was in development for many years, initially developed with an ARM based STM32 microcontroller. An FPGA was then added to give flexibility over pin assignments and a fast logic analyser. Due to supply chain issues with the STM32s, the release was delayed for an additional 2 years until the release of the RP2040 when the board was redesigned around it, forming the modern day design.

The Bus Pirate 5, 5XL and 6 have a 320x240 IPS display that allows seeing the voltage of IO pins, status and current draw at a glance.

References

References

1. (July 2022). "Bus Pirate v3.6 universal serial interface".
2. (12 August 2022). "Bus Pirate v4".
3. (2024-12-01). "JTAG Support on Bus Pirate v5".
4. "Bus Pirate - v3.6a - TOL-12942 - SparkFun Electronics".
5. (2023-08-02). "The Bus Pirate v5 Saga".
6. "Bus Pirate v4 vs v3 comparison - DP".
7. "Available Logic Analyzers {{!}} Bus Pirate 5 Firmware".
8. "Bus Pirate v3.6 - DP".
9. "Sick of Beige compatible cases - DP".
10. (2023-08-02). "The Bus Pirate v5 Saga".