Barrel shifter

Implementation

One way to implement a barrel shifter is as a sequence of multiplexers where the output of one multiplexer is connected to the input of the next multiplexer in a way that depends on the shift distance.

The fastest shifters are implemented as full crossbars, in a manner similar to the 4-bit shifter depicted above, only larger. These incur the least delay, with the output always a single gate delay behind the input to be shifted (after allowing the small time needed for the shift count decoder to settle; this penalty is only incurred when the shift count changes). These crossbar shifters require however n2 gates for n-bit shifts. Because of this, the barrel shifter is often implemented as a cascade of parallel 2×1 multiplexers instead, which allows a large reduction in gate count, now growing only with n log n; the propagation delay is larger, growing with log n (instead of being constant as with the crossbar shifter).

For an 8-bit barrel shifter, two intermediate signals are used which shifts by four and two bits, or passes the same data, based on the value of S[2] and S[1]. This signal is then shifted by another multiplexer, which is controlled by S[0]:

int1 = IN , if S[2] == 0 = IN
int2 = int1 , if S[1] == 0 = int1 OUT = int2 , if S[0] == 0 = int2

Larger barrel shifters have additional stages.

The cascaded shifter has the further advantage over the full crossbar shifter of not requiring any decoding logic for the shift count.

Cost

The number of multiplexers required for an n-bit word is n\log_2 n.{{cite book

• 128-bit — 128 \times \log_2 128 = 128 \times 7 = 896
• 64-bit — 64 \times \log_2 64 = 64 \times 6 = 384
• 32-bit — 32 \times \log_2 32 = 32 \times 5 = 160
• 16-bit — 16 \times \log_2 16 = 16 \times 4 = 64
• 8-bit — 8 \times \log_2 8 = 8 \times 3 = 24

Cost of critical path in FO4 (estimated, without wire delay):

• 32-bit: from 18 FO4 to 14 FO4{{cite web | access-date=2016-05-19}}

Uses

A common usage of a barrel shifter is in the hardware implementation of floating-point arithmetic. For a floating-point add or subtract operation, the significands of the two numbers must be aligned, which requires shifting the smaller number to the right, increasing its exponent, until it matches the exponent of the larger number. This is done by subtracting the exponents and using the barrel shifter to shift the smaller number to the right by the difference, in one cycle.

References

References

1. (2015). "Proceedings of Second International Conference on Signal Processing, Image Processing and VLSI". Research Publishing Services.